Global and China IC Advanced Packaging Industry Report, 2013-2014 is mainly about the following:
- Overview of semiconductor industry
- Status quo of memory and wafer foundry industry
- Upstream market of semiconductor industry
- Trend in emerging advanced packaging technologies
- Analysis and ranking of packaging enterprises
- 23 major advanced packaging vendors
Typically, an independent packaging and testing vendor is known as OSAT. In 1997, the OSAT industry scale was no more than USD5.1 billion or so, making up 19.6% of the semiconductor industry, in sharp contrast to the market size of USD23.6 billion in 2011, a figure that occupied 30% of the semiconductor industry. During 2011-2013, the packaging and testing industry saw an AAGR of less than 5% for 3 consecutive years, which mainly resulted from the fact the advanced packaging technologies developed from 2005-2010 period began to be popularized, thus leading to a dramatic decline in unit prices, these packaging technologies including FC-BGA, WLCSP, QFN, SiP, and PoP, etc.
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At present, both mobile phones and computers are developing towards ultra-thin, multi-core and high frequency while memory industry is targeted at ultra bandwidth, which would prompt the packaging and testing market to satisfy the market demand with the updated technologies. Since 2014, a number of new technologies have been applied, which would bring with it a more than 6% growth in packaging and testing industry. These technologies, including MLP PoP, Cu Bol, FC-CSP, FOWLP, Embedded Component (Trace) Substrate, and 2.5D, are mainly used in smartphones and ultra-thin computers, with a robust market demand. Meanwhile, TSV is expected to be widely applied from the memory industry. On the other hand, some major IDM vendors like Panasonic and Renesas Electronics have retreated from packaging business. It is projected that in 2014 the output value of OSAT industry will grow by 8.4% to USD27.2 billion, and advanced packaging industry probably by 10% to USD18.2 billion.
In terms of industry, a type of middle-end enterprises has emerged between Foundry or IDM and OSAT since 2008. In the era of FC packaging, these enterprises mainly provide RDL, Wafer Bumping, and Wafer Level Test. But in the age of 2.5D and 3D, their scope of business has been greatly expanded, primarily including Micro Bumping, Thin & Reveal, Interposer, Via Middle, WL-Carrier Assembly, etc.
In 2014, the biggest event that happened to the packaging industry was nothing but the attempt of Temasek to sell STATS ChipPAC, the world’s fifth largest packaging company. Owned by the Government of Singapore, STATS ChipPAC is less competitive, especially when facing the competition from the Taiwanese rivals. Although it has state-of-the-art technologies, yet the company depends heavily on its key accounts, including Infineon, Apple Inc., Qualcomm, and Broadcom, etc. However, Infineon has gradually withdrawn from mobile phone market while Apple Inc. and Qualcomm have diversified supply chain risks, cutting down on the orders of STATS ChipPAC, which led to a fall in revenue for four consecutive years.
In addition, a second major event was the fact that SPIL had won massive orders from Qualcomm, MTK as well as Huawei’s Hisilicon, which would considerably increase SPIL’s revenue. In H1 2014, SPIL harvested a substantial growth of 27% in revenue, making it the world’s No.1 by operating margin. In 2014, the company is expected to surpass Amkor as the global second.
In terms of technology, 3D (TSV) application is not yet so mature that the market is still confined to such non-mainstream fields as CIS, MEMS, and HB LED. The key Logic+Memory market have not made progress and will not get improvements in the coming 5 years, with PoP packaging still the mainstream. This comes mainly from the following reasons:
- Costs. PoP packaging is stable and mature, with lower costs. Also, it demonstrates great potential of performance;
- KGD. Before the PoP packaging, its internal components have been tested individually and burn-in while TSV requires packaging before test and burn-in. Once some problems occur to an individual component, then the entire TSV has to be discarded;
- TSV cannot rework but PoP could;
- TSV need to thin wafer for several times as wafer is easy to bend or break, with a low yield;
- The electronic system that supports PoP packaging is widely applicable, the current SMT production line is feasible, but TSV needs change;
- PoP packaging has a very high yield;
- PoP packaging has a good business model and failure analysis methods are mature. By contrast, TSV’s failure analysis methods are not mature, which made it difficult to define the responsibility of the bad products.
- PoP packaging is the Logic + Memory, and Memory is one of the ICs with the highest prices among the mobile phone semiconductors, with its prices showing sharp and frequent fluctuation. Moreover, it has higher market concentration. To ensure a good management of supply chain, the vendors must promptly adjust the purchase quantity or purchase price of Memory. However, as for TSV, the prices and purchase quantity cannot be changed, which, to rapidly changing electronics industry, means the huge losses or a failure of timely shipment.
Another problem of 3D packaging is heterogeneity heat treatment. Logic Die such as CPU or GPU may generate a large amount of calories while Memory, which is coordinated with Logic Die, generates a small amount of heat. If CPU is integrated with DRAM and NAND Flash, its high heat will affect DRAM and NAND Flash. And if we use 3D packaging, heat dissipation cannot be solved. The best solution is to adopt 2.5D packaging.
Of course, 3D packaging is still promising, and a breakthrough has been made in the Memory. Since the current Stacked Wire Bonding SiP has no longer satisfied the demand, the vendors, hoping to further raise the Bandwidth to 15Gbps or above, must adopt TSV. Micron calls it as HMC, and SK Hynix known as WIDE 1/O2. It is expected that by the end of 2014 TSV packaging will achieve mass production.
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Currently, what has become the top concern in the market is the packaging of mobile phone CPU, Application Processor and Baseband. And the mainstream CPU packaging formats now include PoP, which would develop towards reducing the size, raising Fine Pitch and embedding Passive/Active Component. The technologies for reducing the size like MLP are represented by APQ8064 of Qualcomm; those for raising Fine Pitch by Kirin 920 of Hisilicon. And Embedded Passive/Active Component is typically represented by A7 of Apple. The mainstream baseband packaging is now FC-BGA and the future development trend may be FC-CSP, whose typical example is MT6589 of MTK.
Packaging industry is dependent heavily on the upstream Foundry and IDM vendors. This is particularly true of Foundry, which would have great impact on the performance of packaging vendors. Packaging technologies in Mainland China have long been backward, which was mainly due to a lack of advanced Foundry except indeed their own reasons. The packaging industry in Taiwan leads the world, which is mainly because Taiwan has the world’s most advanced Foundry, with 80% of high-end IC globally from the region. Therefore, no matter how strong the mainland companies are, they cannot bolster the packaging industry there. Take Hisilicon for example, its high-end IC is all produced by Taiwan’s TSMC, packaged by ASE and SPIL, and tested by SPIL and KYEC.
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